Systems 26
- There Is No Such Thing as a Passive Read
- The World Would Be a Better Place Had Compiler Engineers Stepped Up
- A Type System Is a Search Oracle
- Heterogeneity Moved Inside the Chip
- The Illusion of Determinism in Disaggregated Inference
- A Cache Its Own Prefill Would Never Have Produced
- An AST Is a Cache-Miss Generator
- Two Schedulers, One SLO
- There Is No Address
- The KV Cache Has No ABI
- Prefill and Decode Want Different Computers
- Provenance Is Not Correctness
- Tight, Reproducible, and Wrong: When Your Cores Are Not Interchangeable
- A Tour of XLA: The Compiler Beneath JAX, TensorFlow, and PyTorch
- Anatomy of a CUDA Binary
- Where Should Your Code Live?
- The Anatomy of an Instruction Pipeline Hazard
- Three Ways to Take a Gradient: Tape, Trace, and Source Transform
- A tour of MLIR: The Dialect Stack Everyone Depends On
- Crossing the Boundary: Custom Kernels and the C++/Python ABI in vLLM
- Building vLLM from Source: A Field Guide (with all the pitfalls)
- vLLM's op IR, or: where the inference engine meets the compiler
- Loop Unrolling in the ML Era
- "Hello, World!" in a Heterogeneous System
- Hardening the ELF: Understanding RELRO and GOT Overwrites
- The Hidden Complexity of the Simplest C Program